Cypress Semiconductor /psoc63 /SCB0 /SPI_CTRL

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Interpret as SPI_CTRL

MODE=SPI_MOTOROLA

Description

SPI control

Fields

SSEL_CONTINUOUS	Continuous SPI data transfers enabled (‘1’) or not (‘0’). This field is used in master mode. In slave mode, both continuous and non-continuous SPI data transfers are supported independent of this field. When continuous transfers are enabled individual data frame transfers are not necessarily seperated by slave deselection (as indicated by the level or pulse on the SELECT line): if the TX FIFO has multiple data frames, data frames are send out without slave deselection. When continuous transfers are not enabled individual data frame transfers are always seperated by slave deselection: independent of the availability of TX FIFO data frames, data frames are sent out with slave deselection.
SELECT_PRECEDE	Only used in SPI Texas Instruments’ submode. When ‘1’, the data frame start indication is a pulse on the Slave SELECT line that precedes the transfer of the first data frame bit. When ‘0’, the data frame start indication is a pulse on the Slave SELECT line that coincides with the transfer of the first data frame bit.
CPHA	N/A
CPOL	N/A
LATE_MISO_SAMPLE	Changes the SCLK edge on which MISO is captured. Only used in master mode. When ‘0’, the default applies ( for Motorola as determined by CPOL and CPHA, for Texas Instruments on the falling edge of SCLK and for National Semiconductors on the rising edge of SCLK). When ‘1’, the alternate clock edge is used (which comes half a SPI SCLK period later). Late sampling addresses the round trip delay associated with transmitting SCLK from the master to the slave and transmitting MISO from the slave to the master.
SCLK_CONTINUOUS	N/A
SSEL_POLARITY0	N/A
SSEL_POLARITY1	N/A
SSEL_POLARITY2	N/A
SSEL_POLARITY3	N/A
LOOPBACK	Local loopback control (does NOT affect the information on the pins). Only used in master mode. Not used in National Semiconductors submode. ‘0’: No local loopback ‘1’: the SPI master MISO line is connected to the SPI master MOSI line. In other words, in loopback mode the SPI master receives on MISO what it transmits on MOSI.
MODE	N/A 0 (SPI_MOTOROLA): SPI Motorola submode. In master mode, when not transmitting data (Slave SELECT is inactive), SCLK is stable at CPOL. In slave mode, when not selected, SCLK is ignored; i.e. it can be either stable or clocking. In master mode, when there is no data to transmit (TX FIFO is empty), Slave SELECT is inactive. 1 (SPI_TI): SPI Texas Instruments submode. In master mode, when not transmitting data, SCLK is stable at ‘0’. In slave mode, when not selected, SCLK is ignored; i.e. it can be either stable or clocking. In master mode, when there is no data to transmit (TX FIFO is empty), Slave SELECT is inactive; i.e. no pulse is generated. 2 (SPI_NS): SPI National Semiconducturs submode. In master mode, when not transmitting data, SCLK is stable at ‘0’. In slave mode, when not selected, SCLK is ignored; i.e. it can be either stable or clocking. In master mode, when there is no data to transmit (TX FIFO is empty), Slave SELECT is inactive.
SSEL	Selects one of the four incoming/outgoing SPI slave select signals: 0: Slave 0, SSEL[0]. 1: Slave 1, SSEL[1]. 2: Slave 2, SSEL[2]. 3: Slave 3, SSEL[3]. SCB block should be disabled when changes are made to this field.
MASTER_MODE	N/A

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